High-k Metal Gate

Intel's 45nm (\"Penryn\") process, shipped Nov 12 2007 -- replaced the decades-old silicon-dioxide gate dielectric with a hafnium-based high-k dielectric plus metal gate electrodes, closing a leakage-current wall that dimensional scaling of Planar CMOS alone could no longer solve. Gordon Moore himself, in Intel's own press materials, called it \"the biggest change in transistor technology since the introduction of polysilicon-gate MOS transistors in the late 1960s\" -- a primary-source precedence claim. Intel's 22nm Tri-Gate (2011, i.e. this graph's FinFET node) is documented as its third generation of high-k/metal gates, now combined with 3D fin geometry -- FinFET's own lineage runs through this node, not directly from Planar CMOS. Inserted between Planar CMOS and FinFET, replacing the prior direct edge -- see docs/HISTORICAL_TECH_SCOPING.md Sec9.2. No live tracking planned for a single fixed-year fabrication milestone.